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Senior FPGA Design Engineer (Top Secret Clearance)

Company: L3Harris
Location: Palm Bay
Posted on: March 10, 2020

Job Description:

Description: Senior FPGA Design--Engineer (Top Secret Clearance) Job Code:--SAS20192511-34949 Job Location:--Palm Bay-FL,--Alpharetta-GA, Mt. Prospect-IL,--Wilmington-MA, Van Nuys-CA,--San Diego-CA, or--Nashua-NHJob Description:The FPGA Engineer will perform the following:Participate with a small team of designers in architecting FPGA design solutions.Simulate the FPGA to verify performance, then integrate and test the FPGA on the circuit card assembly.Full life cycle development and integration of VHDL into different families of FPGAs.Produce all required documentation for design elements and necessary artifacts for verificationPrepare and present design reviews at various phases of the design cycle.Understand the requirements, architect a solution targeting an FPGA against those requirements and implement that solution in an FPGA.Qualifications:Bachelor's Degree with a minimum 6 years prior relevant experience, or equivalent.Experience with VHDL, the FPGA design process and the tools used to generate the FPGA designs.Experience with developing advanced verification methodologies, including self-checking test benches.Active Top Secret Security ClearancePreferred Additional Skills:Understanding synthesis methodologies and resultsAbility to work with timing constraints and understanding clock domain issues. --Experience with high speed memory interfaces.Experience with high speed serial protocols (PCI Express, SRIO, Ethernet).Experience with Analog to Digital (AD) and Digital to Analog (DA) interfaces.Experience with control protocols such I2C, SPI, RS-232/422, and SpaceWire.Self-motivated individual with the ability--to work and communicate effectively within a development group.Ability to work in a team environment and negotiate solutions with Hardware / Software Engineering and Systems Engineering is preferred.Proficiency with Xilinx, Microsemi, and Altera Tool Suites (VHDL, Synthesis, Place and Route, Simulation, Timing Analysis).

Keywords: L3Harris, Palm Bay , Senior FPGA Design Engineer (Top Secret Clearance), Engineering , Palm Bay, Florida

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